1. Field of Invention
This invention relates to a multi-chips module package. More particularly, the present invention is related to a multi-chips module package for integrating wire-bonded chip and flip chip therein and a manufacturing method thereof.
2. Related Art
As we know, in the semiconductor industries, the manufacture of semiconductors mainly comprises the manufacture of wafers and the assembly of integrated circuits devices. Therein, the integrated circuits (ICs) devices are completely formed by the processes of forming integrated circuits devices on the semiconductor wafers, sawing the wafers into individual integrated circuits devices, placing the individual integrated circuits devices on the substrates, electrically connecting the integrated circuits devices to the substrates respectively and encapsulating the integrated circuits devices and substrates to form a plurality of individual assembly packages. Due to the encapsulation covering the integrated circuits devices, the integrated circuits devices are able to be protected from the damp entering therein. In addition, the individual assembly packages may further provide external terminals for connecting to printed circuit board (PCB).
However, recently, integrated circuits packaging technology is becoming a limiting factor for the development in packaging integrated circuits devices of higher performance. Semiconductor package designers are struggling to keep pace with the increase in pin count, size limitations, low profile, and other evolving requirements for packaging and mounting integrated circuits.
Due to the assembly package in miniature and the integrated circuits operation in high frequency, MCM (multi-chips module) packages are commonly used in said assembly packages and electronic devices. Usually, said MCM package mainly comprising at least two chips encapsulated therein is provided, for example a processor unit, a memory unit and related logic units, to upgrade the electrical performance of said assembly package. In addition, the electrical paths between the chips in said MCM package are short so as to reduce the signal delay and save the reading and writing time.
Generally speaking, as shown in FIG. 1, it illustrates a cross-sectional view of a conventional multi-chips module package. Therein, said multi-chips module package 100 mainly comprises two chips 10 and 12, a substrate 16, an encapsulation 18, a plurality of electrically conductive wires 19. The substrate 16 has an upper surface for carrying the chips 10 and 12 which are located in parallel, and the chips 10 and 12 are electrically connected to the substrate 16 through said wires 19. In addition, the encapsulation 18 covers the chips 10 and 12, said wires 19 and a portion of the substrate 16. Hence, the area of the substrate 16 will be increased according to the numbers of the chips to be carried thereon so as to make the complete package larger and larger.
Accordingly, the semiconductor industries develop a stacked multi-chips package as shown in FIG. 2, which illustrates that the package mainly comprises a first chip 28, a second chip 26 and a substrate 20. Therein, the first chip is attached to the substrate 20 via an adhesive layer (not shown) and the second chip 26 is mounted onto the first chip 28. Besides, the upper surface of the substrate 20 further has a plurality of wire-bonding pads 22 and 24, and the first chip 28 and the second chip 26 are electrically connected to the substrate 20 through a plurality wires 29 wire-bonding to the wire-bond pads 22 and 24 respectively. Thus, the electrical signals can be transmitted to the external electronic devices, such as printed circuit boards, through a plurality of solder balls attached to the lower surface of the substrate 20. Moreover, an encapsulation 28 is formed to cover the first chip 28 and the second chip 26 to well protect the chips 26 and 28 from being moisture entering into the chips 26 and 28 to cause the chips 26 and 28 damaged.
Furthermore, as shown in FIG. 3, it illustrates a multi-chips stacked package patented in U.S. Pat. No. 5,973,403 to James M. Wark et.al entitled “Device and Method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice” and said stacked package mainly comprises a flip chip 48, a wire-bonded chip 46, and a substrate 40. The flip chip 48 is bonded to the upper surface of the substrate 40 through a plurality of bumps 52 formed on the flip chip 48 connecting to the flip-chip pads 44 formed on the substrate 40; and the wire-bonded chip 46 is mounted to the back surface of the flip chip 48 and electrically connected to the wire-bonded pads 42 formed on the substrate 40. To be noted, the bumps 47 are formed on the flip chip 48 through typical bumping process and said bumps 47 can be solder bumps or gold bumps. Moreover, an encapsulation 49 is formed to cover the wire-bonded chip 46 and the flip chip 48 to well protect the chips 46 and 48 from being moisture entering into the chips 46 and 48 to cause the chips 46 and 48 damaged.
As mentioned above, the layout of the circuits arranged in the substrate applicable to such package as shown above is so complex that the cost of substrate is very expensive due to the complexity of manufacturing substrate. Moreover, the electrical traces are longer so that the impedance, the inductance and the noise will be increased to lower the electrical performance.
Moreover, a multi-chips stacked package patented in U.S. Pat. No. 5,973,403 to Lo et.al entitled “Flip Chip Type Quad Hat Non-Leaded Package” is incorporated into this application for reference. Therein, it discloses a flip chip package which mainly comprises a plurality of leads for taking as electrical terminals for electrically connecting the chip and the external electronic devices. To be noted, the leads have first surfaces and second surfaces, and the chip are bonded to the first surfaces through a plurality of bumps and the second surfaces are exposed out of the encapsulation to connect to said external electronic devices as mentioned above. However, the leads are easily separated from the encapsulation so as to be not able to well connect to external electronic devices.
Therefore, providing another multi-chips module package and manufacturing method thereof to solve the mentioned-above disadvantages is the most important task in this invention.